IBIS Macromodel Task Group

Meeting date: 14 April 2015

Members (asterisk for those attending):
ANSYS:                      * Dan Dvorscak
                            * Curtis Clark
Avago (LSI)                   Xingdong Dai
Cadence Design Systems:     * Ambrish Varma
                              Brad Brim
                              Kumar Keshavan
                              Ken Willis
eASIC                       * David Banas
Ericsson:                     Anders Ekholm
IBM                           Steve Parker
Intel:                      * Michael Mirmak
Keysight Technologies:      * Fangyi Rao
                            * Radek Biernacki
			    * Nicholas Tzou
Maxim Integrated Products:    Hassan Rafat
Mentor Graphics:            * John Angulo
                            * Arpad Muranyi
Micron Technology:          * Randy Wolff
                              Justin Butterfield
QLogic Corp.                  James Zhou
                              Andy Joy
eASIC                         Marc Kowalski
SiSoft:                     * Walter Katz
                            * Todd Westerhoff
                            * Mike LaBonte
Synopsys                      Rita Horner
Teraspeed Consulting Group:   Scott McMorrow
Teraspeed Labs:             * Bob Ross

(Note: Agilent has changed to Keysight)

The meeting was led by Arpad Muranyi.

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Opens:

- Arpad: We are hoping for a vote on package model updates.

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Call for patent disclosure:

- None


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Review of ARs:

- Walter send updated PAM4 BIRD to Mike for posting.
  - Done

- Randy send updated C_comp BIRD to Mike for posting.
  - Done

- Michael M update AMI Directionality BIRD
  - No update

- Arpad to review IBIS specification for min max issues.
  - In progress.


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New Discussion:

BIRD 175:

- Arpad showed the updated BIRD 175.
- Arpad: The question is what to do for pins not in [Pin Numbers] and not in [Merged Pins]
  - The rule says it should be unconnected if part of a bus.
  - Pin 7 here will be disconnected and simulation will fail.
  - It could be RLC modeled, but that would be incorrect.
  - We could disallow the situation.
  - All pins of a [Pin Mapping] bus would have to be in [Pin Numbers] or [Merged Pins].
- Radek: It is still conditioned on existence of [Merged Pins].
  - With no [Merged Pins] that is another case.
- Mike L: Is "and/or" valid here?
  - Each pin in [Merged Pins] has to be in [Pin Numbers].
- Arpad: The pin after the [Merged Pins] keyword is in [Pin Numbers]
  - The others are not.
- Radek: Agree.

- Arpad: Radek suggested changes to the red text on page 4.
- Radek: An open circuit conflicts with the [Merged Pins] section.
- Arpad: The open is between pin and pad, but that does not make it totally open.
- Radek: It needs to be stated more precisely.
  - The RLC must no be used for that pin and pad.
- Randy: Was that in an email?
- Arpad emailed the file to Randy.

- Arpad pointed out suggested text from Radek.
- Arpad: The reader does not know about the [Merged Pins] keyword at this point.
- Radek: We should not use the term "open circuit".
- Randy: Either text is OK.
- Bob: This paragraph can apply to connections without [Merged Pins].
- Randy: We could say it creates a no-connection between pin and pad.
- Arpad: We call it a no-connect but the [Merged Pins] creates a connection later.

- Radek: In the para starting with "Each pin name" (page 5).
  - "may not be present" should be "shall not be present".
- Bob: Is this the draft with the table in it?
- Arpad: We can discuss that later.

- Radek: If [Pin Mapping] is present but not [Merged Pins] is this allowed?
- Arpad: The first part of the red paragraph covers that.
- Radek: The second sentence excludes the [Pin Mapping] pins.
- Arpad: The "However" is the exception to the first part.
- Radek: RLC is limited to pins not under [Pin Numbers] and not under [Pin Mapping].
- Arpad: Disagree.
- Randy: Bob's table may help.
- Arpad: That may be in the BIRD but it will not be in the specification.
- Bob: The first sentence does not say "Without [Pin Mapping]".
- Arpad: We need to take this offline.

- Arpad showed a table of rules drafted by Bob.
- Arpad: The background section of the BIRD has been updated to include this.
- Bob: The rules for signal pins are unchanged.
  - Up to 6.0 we never say the power/GND pins are treated differently.
  - Circuit call is illegal with [Pin Mapping].
  - For Power/GND pins many cases are the same.
  - Where [Pin Mapping] and [Pin Numbers] exist but not [Merged Pins] the rule changes.
  - With [Merged Pins] we always use model data from [Pin Numbers]
  - This is where the "all bus pins must be accounted for" rule comes in.
  - A bus might connect to no [Pin Numbers] at all and there we use RLC.

- Radek: In the third case why is [Merged Pins] illegal?
- Bob: [Merged Pins] requires [Pin Numbers].
- Radek: This is a usefulness issue.
  - The second sentence under "However" should have the statement about [Merged Pins].
- Arpad: Disagree, they are unrelated.
- Bob: Agree with Arpad.
  - The first part is a general rule, [Merged Pins] has not come up yet.
- Arpad: There should be no rule duplication.
- Radek: It first excludes the rule then it allows it.
- Bob: Should the table be in the specification?

- Arpad: Is this ready for submission to the Open Forum for a vote?
- Bob: We do not have a complete draft ready yet.
- Mike L: Could these issues be settled in the editorial committee?
- Radek: We can work on it this week and have it ready next week.

AR: Arpad, Randy and Radek prepare BIRD 175 draft ready for Open Forum.


PAM4 BIRD:

- Walter: I suggested a paragraph to explain Bit Time, etc.
  - I will find the places in IBIS that are affected.
  - Draft 15 will address this.

AR: Walter find all places in IBIS specification affected by PAM4 BIRD.


Directionality BIRD:

- No update.


C_comp BIRD:

- Randy: The C_comp BIRD is open for comments.


Back-channel BIRD:

- Walter: No progress on back-channel.


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Next meeting: 21 Apr 2015 12:00pm PT
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IBIS Interconnect SPICE Wish List:

1) Simulator directives
